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Dive into the retro feeling and build yourself a Commodore PET replica

Need more speed? Speed up your 6502 computer with this 10 MHz 6502 CPU replacement board

Interested in electronics design? Look at the design lesson I got from Bil Herd, the hardware designer of the C128

CS/A65 Power supply

This board implements the basic power supply facilities, using a standard PC power supply as actual supply. It has a 3.3V power generation, a 50Hz signal, as well as battery backup (incl. Li-ion battery charging circuit

Additionally it includes a Reset circuit and a 16MHz clock source, as well as (since 1.1) an I2C realtime clock and flash ROM.

The 3.3V generation uses a standard LM317 voltage generator. The 50Hz generation uses the CMOS (this is important) version of the LMC555. Both schematics come from www.elektronik-compendium.de.

The Li-ion battery charger is a standard schematics from the datasheet of the used MAX712 battery charger.

2010-01-06: Since version 1.2 the board also contains an I2C master with the related RDY generation as the P8584 I2C master is not running faster than 1MHz.

Table of content

Top
  • Board Revisions
  • 1.2B (prototype)
  • 1.1B (prototype)
  • 1.1A (prototype with bugs)
    •

    Board revisions

    Top

    Version: 1.2B

    Status: prototype

    Notes

    msg

    This board adds an I2C master (with related RDY generation, as the P8584 does not work on 2MHz).

    Also adds a jumper to decouple the 3.3V from the bus.

    warn The layout is untested (I have built it on a 1.2A version, which is missing JP9 (decouple 3.3V), but also has a serious bug in that it has traces on the top side under the TO220 parts! Therefore I am not publishing the 1.2A version.

    Files

    schem csa_pwr_v1.2b.sch
    schem csa_pwr-v1.2b-sch.png
    layout csa_pwr_v1.2b.brd
    layout csa_pwr-v1.2b-brd.png

    Version: 1.1B

    Status: prototype

    Notes

    msg This board has all features. It fixes the bugs in the 1.1A version: no /RESET pullup, wrong R17 value for the 3.3V generation, and decoupling capacitors for the I2C ICs. Also it has the addresses of the I2C chips fixed (in V1.1A they have the same I2C address...)
    warn The layout is untested.

    Files

    schem csa_pwr-v1.1b.sch
    schem csa_pwr_v1.1b-sch.png
    layout csa_pwr-v1.1b.brd
    layout csa_pwr_v1.1b-brd.png

    Version: 1.1A

    Status: prototype with bugs

    Notes

    warn Watch out, this board has a wrong resistor R17 value and other bugs, see description of 1.1B.

    Files

    schem csa_pwr-v1.1a.sch
    schem csa_pwr_v1.1a-sch.png
    layout csa_pwr-v1.1a.brd
    layout csa_pwr_v1.1a-brd.png
    photo csa_pwr_v1.1a.png(Without the battery, though)