65002 Operation Documentation

This page lists all the opcodes of the 65002 with appropriate explanations.

List of operations

ADB - Add value to B register
ADC - Add content of memory location to accumulator
ADD - Add content of memory location to accumulator without using carry as input
ADE - Add value to E register
ADS - Add value to stack pointer
AND - Bitwise AND accumulator with content of memory location
ASL - Arithmetic Shift Left - shift accumulator one bit to the left, shifting in zero in bit 0
ASR - Arithmetic Shift Right - Similar to LSR, but shifts in the sign of the value, not zero
BCC - Branch on carry clear - take branch when C flag is cleared
BCN - Bit Count: counts 1-bits in AC or in given location, stores number of 1-bits back in AC
BCS - Branch on carry set - take branch when C flag is set
BEQ - Branch on equal - take branch when Z flag is set
BEV - Branch on even
BGES - Branch on signed greater or equal than
BGT - Branch if greater - take branch when C flag is set but Z flag is clear
BGTS - Branch if greater - take branch when signed greater or equal G flag is set but Z flag is clear
BIT - Bitwise test with accumulator - AND the memory location with the accumulator, and set N (=bit 7), V (=bit 7), Z (iff all bits zero) flags from the result. In case of the accumulator addressing, simply set the flags from the accumulator
BLE - Branch if less or equal - take branch when C flag is clear or Z flag is set
BLES - Branch if less or equal - take branch when signed greater or equal flag G is clear or Z flag is set
BLTS - Branch on signed less than
BMI - Branch on minus - take branch when N flag is set
BNE - Branch on not equal - take branch when Z flag is cleared
BOD - Branch on odd
BPL - Branch on plus - take branch when N flag is cleared
BRA - Branch always - branch independent from any flags
BRK - Starts the break routine.
BSR - Branch subroutine - similar to JSR, but use relative addressing similar to branch opcodes
BVC - Branch on overflow clear - take branch when V flag is cleared
BVS - Branch on overflow set - take branch when V flag is set
CLC - Clear the C flag
CLD - Clear the decimal (D) flag
CLI - Clear the interrupt (I) flag
CLV - Clear the overflow (V) flag
CMP - Compare accumulator with content of memory location
CPX - Compare X register with content of memory location
CPY - Compare Y register with content of memory location
DEC - Decrement the content of a memory location by one
DEX - Decrement the content of the X register by one
DEY - Decrement the Y register by one
EOR - Bitwise Exclusive-OR accumulator with content of memory location
EXT - Extend a value in AC from RS to the full size. Setting LE defines the type of extension.
INC - Increment the content of a memory location by one
INV - invert AC, i.e. set AC to the 2s-complement of AC
INX - Increment the content of the X register by one
INY - Increment the content of the Y register by one
JMP - Jump to new code address
JSR - Jump subroutine - jump to a new code location, save return address on stack for RTS
LDA - Load accumulator
LDB - Load B with an immediate value
LDE - Load E with an immediate value
LDX - Load X register
LDY - Load Y register
LEA - Load Effective Address: compute the effective address and store it in the E (effective Address) register (always full width)
LSR - Logical Shift Right - shift accumulator one bit to the right, shifting in zero in the highest bit
NOP - No operation
ORA - Bitwise OR accumulator with content of memory location
PEA - Push Effective Address: compute the effective address and push it onto the stack (always full width)
PHA - Push contents of the accumulator onto the stack
PHB - Push B onto stack (full width)
PHE - Push E onto stack (always full width)
PHP - Push processor status register onto the stack
PHX - Push contents of the X register onto the stack
PHY - Push contents of the Y register onto the stack
PLA - Pull the contents of the accumulator from the stack
PLB - Pull E from stack (full width)
PLE - Pull E from stack (full width)
PLP - Pull processor status register from the stack
PLX - Pull the contents of the X register from the stack
PLY - Pull the contents of the Y register from the stack
PRB - Push and Replace Base register: Push base offset register to the stack, then transfer accumulator to the base register
RDL - Rotate Direct Left - similar to ROL, but do not shift in carry, but the highest bit of the original value
RDR - Rotate Direct Right - similar to ROR, but do not shift in carry, but the lowest bit of the original value
ROL - Rotate Left - shift accumulator one bit to the left, shifting in the carry flag in bit 0, and shifting the highest bit into the carry flag instead.
ROR - Rotate Right - shift accumulator one bit to the right, shifting in the carry flag in the highest bit, and shifting bit 0 into the carry flag instead.
RTI - Return from interrupt
RTS - Return from subroutine - read return address from stack
RTU - Return from trap handler.
SAB - Swap A register with B register. Always done full width, no flags set.
SAE - Swap AC with E register. Always done full width, no flags set.
SAX - Swap AC with X register. Always done full width, no flags set.
SAY - Swap AC with Y register. Always done full width, no flags set.
SBB - Substract value from B register
SBC - Substract content of memory location from accumulator
SBE - Add value to E register
SBS - Substract value from stack pointer
SEB - Swap E register with B register. Always done full width, no flags set.
SEC - Set the C flag
SED - Set the decimal (D) flag
SEI - Set the interrupt (I) flag
STA - Store the content of the accumulator into a memory location
STX - Store the content of the X register to memory.
STY - Store the content of the Y register to memory.
STZ - Store zero into a memory location
SUB - Substract content of memory location from accumulator without using the carry flag as input
SWP - swap upper and lower part nibble / byte / word / long word of a byte / word / long / quad (longlong) operand in Accumulator
SXY - Swap X with Y register. Always done full width, no flags set.
TAB - Transfer AC to B register
TAE - Transfer AC to E register
TAX - Transfer the contents of accumulator into the X register
TAY - Transfer the contents of accumulator into the Y register
TBA - Transfer base register B to Accumulator
TBE - Transfer content of B register into E register (full width)
TEA - Transfer E register to Accumulator
TEB - Transfer E to B register (full width)
TPA - Transfer Program counter to Accumulator
TRB - Test and Reset Bit - AND the memory location with the accumulator, and set the Z flag from the result, then CLEAR all bits in the memory location that are set in the accumulator.
TRP - Trap into 65k supervisor mode
TSB - Test and Set Bit - AND the memory location with the accumulator, and set the Z flag from the result, then SET all bits in the memory location that are set in the accumulator.
TSX - Transfer the contents of the stack pointer into the X register (Note: needs RS to keep compatibility with 6502)
TSY - Transfer stack pointer to Y
TXA - Transfer the contents of the X register into the accumulator
TXS - Transfer the contents of X register into the stack pointer (Note: needs RS to keep compatibility with 6502)
TYA - Transfer the contents of the Y register into the accumulator
TYS - Transfer Y to stack pointer

ADB

Add value to B register

ADB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x65	65k	RS, LE, NF	Immediate
EXT	0x75	65k	RS, NF	Accumulator

ADC

Add content of memory location to accumulator

ADC
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x61		AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 16bit
	0x63	65k	AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 64bit
	0x65		AM, OF, RS, LE, UM, NF	Zeropage
	0x69		RS, LE, NF	Immediate
	0x6d		AM, OF, RS, LE, UM, NF	Absolute 16bit
	0x71		AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit indexed with Y
	0x72	cmos	AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit
	0x73	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit indexed with Y
	0x75		AM, OF, RS, LE, UM, NF	Zeropage indexed with X
	0x77	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit
	0x79		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with Y
	0x7d		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with X
EXT	0x69	65k	RS, LE, UM, NF	E indirect

Description

Add the operand to the accumulator and store back in the accumulator. Set the flags from the result. Use Decimal or Binary add depending on whether the decimal mode status bis is set or not respectively.

        		AC, C, V <= AC + Operand, C
        		N <= Tmp(7)
        		Z <= Z(Tmp)

For a handling of the V-flag please see http://www.6502.org/tutorials/vflag.html.

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS and LE together also determine the width of the operation. Note that the default is to use BYTE-wide operation without load extension.

ADD

Add content of memory location to accumulator without using carry as input

ADD
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x05		RS, LE, NF	Immediate
EXT	0x00	65k	RS, LE, UM, NF	E indirect

Description

Add the operand to the accumulator and store back in the accumulator. Set the flags from the result. Use Binary mode add only. Do not use the Carry flag as input.

        		AC, C, V <= AC + Operand
        		N <= Tmp(7)
        		Z <= Z(Tmp)

For a handling of the V-flag please see http://www.6502.org/tutorials/vflag.html.

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS and LE together also determine the width of the operation. Note that the default is to use BYTE-wide operation without load extension.

ADE

Add value to E register

ADE
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x25	65k	RS, LE, NF	Immediate
EXT	0x35	65k	RS, NF	Accumulator

Add value to stack pointer

ADS
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x45	65k	RS, LE, NF	Immediate
EXT	0x55	65k	RS, NF	Accumulator

AND

Bitwise AND accumulator with content of memory location

AND
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x21		AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 16bit
	0x23	65k	AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 64bit
	0x25		AM, OF, RS, LE, UM, NF	Zeropage
	0x29		RS, LE, NF	Immediate
	0x2d		AM, OF, RS, LE, UM, NF	Absolute 16bit
	0x31		AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit indexed with Y
	0x32	cmos	AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit
	0x33	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit indexed with Y
	0x35		AM, OF, RS, LE, UM, NF	Zeropage indexed with X
	0x37	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit
	0x39		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with Y
	0x3d		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with X
EXT	0x29	65k	RS, LE, UM, NF	E indirect

Description

Bitwise AND the accumulator with the operand and store back in the accumulator. Set the flags from the result.

        		AC <= AC & Operand
        		N <= Tmp(7)
        		Z <= Z(Tmp)

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS and LE together also determine the width of the operation. Note that the default is to use BYTE-wide operation without load extension.

ASL

Arithmetic Shift Left - shift accumulator one bit to the left, shifting in zero in bit 0

ASL
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x06		AM, OF, RS, UM, NF	Zeropage
	0x0a		RS, NF	Accumulator
	0x0e		AM, OF, RS, UM, NF	Absolute 16bit
	0x16		AM, OF, RS, UM, NF	Zeropage indexed with X
	0x1e		AM, OF, RS, UM, NF	Absolute 16bit indexed with X
EXT	0x0f	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with Y
EXT	0x0d	65k	RS, UM, NF	E indirect

Description

Shift the operand or accumulator left one bit (i.e. multiply by 2). Shift in a zero from the right. The bit shifted out is moved into the carry flag. Note this opcode is a read-modify-write opcode and not only has memory-oriented addressing modes but can work on the accumulator alone as well.

        		C <= AC(7)
        		AC(7-1) <= AC(6-0)
        		AC(0) <= 0
        		N <= AC7)
        		Z <= Z(AC)

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS also determine the width of the operation. There is no LE prefix, as the read and write widths are the same. Note that the default is to use BYTE-wide operation without load extension.

ASR

Arithmetic Shift Right - Similar to LSR, but shifts in the sign of the value, not zero

ASR
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x06	65k	AM, OF, RS, UM, NF	Zeropage
EXT	0x0a	65k	RS, NF	Accumulator
EXT	0x0e	65k	AM, OF, RS, UM, NF	Absolute 16bit
EXT	0x16	65k	AM, OF, RS, UM, NF	Zeropage indexed with X
EXT	0x1e	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with X
EXT	0x1f	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with Y
EXT	0x1d	65k	RS, UM, NF	E indirect

Description

Shift the operand or accumulator right one bit (i.e. divide by 2). Shift in the sign (uppermost bit) from the left. The bit shifted out is moved into the carry flag. Note this opcode is a read-modify-write opcode and not only has memory-oriented addressing modes but can work on the accumulator alone as well.

        		C <= AC(0)
        		AC(6-0) <= AC(7-1)
        		N <= AC7)
        		Z <= Z(AC)

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS also determine the width of the operation. There is no LE prefix, as the read and write widths are the same. Note that the default is to use BYTE-wide operation without load extension.

BCC

Synonyms: BLT

Branch on carry clear - take branch when C flag is cleared

BCC
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x90		RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the carry status flag is clear. After a CMP this is a synonym for "less than". The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when N=1 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BCN

Bit Count: counts 1-bits in AC or in given location, stores number of 1-bits back in AC

BCN
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xb4	65k	RS, NF	Accumulator

BCS

Synonyms: BGE

Branch on carry set - take branch when C flag is set

BCS
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xB0		RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the carry status flag is set. After a CMP this is a synonym for "greater or equal". The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when N=1 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BEQ

Branch on equal - take branch when Z flag is set

BEQ
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xf0		RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the zero status flag is set. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when N=1 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BEV

Branch on even

BEV
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x10	65k	RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) if the odd status flag is set. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when O=0 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BGES

Branch on signed greater or equal than

BGES
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x70	65k	RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) if the signed greater or equal status flag G is set. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when G=1 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BGT

Branch if greater - take branch when C flag is set but Z flag is clear

BGT
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xB0	65k	RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the carry status flag is set and the zero status flag is not set. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when (N=1 and Z=0) else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BGTS

Branch if greater - take branch when signed greater or equal G flag is set but Z flag is clear

BGTS
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xF0	65k	RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the signed greater status flag is set and the zero status flag is not set. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when (G=1 and Z=0) else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BIT

Bitwise test with accumulator - AND the memory location with the accumulator, and set N (=bit 7), V (=bit 7), Z (iff all bits zero) flags from the result. In case of the accumulator addressing, simply set the flags from the accumulator

BIT
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x24		AM, OF, RS, LE, UM, NF	Zeropage
	0x2c		AM, OF, RS, LE, UM, NF	Absolute 16bit
	0x34	cmos	AM, OF, RS, LE, UM, NF	Zeropage indexed with X
	0x3c	cmos	AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with X
	0x89	cmos	RS, LE, NF	Immediate
EXT	0x89	65k	RS, LE, UM, NF	E indirect
EXT	0x34	65k	RS, NF	Accumulator

Description

Read the operand and set the N and V flags from the value (from the highest and next-to-highest bit respectively). Then take the operand, and AND it with the accumulator and evaluate the Z-flag.

        		N <= Operand(7)
        		V <= Operand(6)
        		Tmp <= Operand & AC 
        		Z <= Z(Tmp)

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. The UM prefix determines whether the operand resides in user space or not.

The NF prefix allows to implement a read-modify-write AND of a memory location (without the usual and/store sequence) - without setting a flag though.

BLE

Branch if less or equal - take branch when C flag is clear or Z flag is set

BLE
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x90	65k	RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the carry status flag is clear or the zero status flag is set. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when (N=1 and Z=0) else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BLES

Branch if less or equal - take branch when signed greater or equal flag G is clear or Z flag is set

BLES
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xD0	65k	RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the signed greater status flag is clear or the zero status flag is set. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when (G=0 or Z=1) else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BLTS

Branch on signed less than

BLTS
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x50	65k	RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) if the signed greater status or equal flag is not set. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when G=0 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BMI

Branch on minus - take branch when N flag is set

BMI
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x30		RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the negative status flag is set. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when N=1 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BNE

Branch on not equal - take branch when Z flag is cleared

BNE
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xD0		RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the zero status flag is clear. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when N=1 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BOD

Branch on odd

BOD
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x30	65k	RS	Relative

Description

        		PC <= NextPC + Operand when O=1 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BPL

Branch on plus - take branch when N flag is cleared

BPL
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x10		RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the negative status flag is clear. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when N=1 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BRA

Branch always - branch independent from any flags

BRA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x80	cmos	RS	Relative

Description

Branch (always) to the address given by adding the parameter to the address of the next operation (after the branch opcode). The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BRK

Starts the break routine.

BRK
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x00		RS	Immediate

Description

The BRK opcode is used to jump to the BRK vector. It pushes the return address and the status on the stack, then reads the BRK vector (doubling as IRQ vector) and jumps there.

Please note that the address put on the stack is the address of the next instruction. And the BRK opcode is using the immediate addressing mode (although the MOS manual does not state it). Thus the address put on the stack is two bytes behind the address of the BRK!

Before storing the status on the stack, the opcode sets the I-flag to avoid recursive calling of the interrupt routine.

When storing the status on the stack, the B-flag is set to indicate that the shared IRQ/BRK vector has been called from a BRK and not an IRQ.

        		Stack(SP--) <= > NextPC
        		Stack(SP--) <= < NextPC
        		Stack(SP--) <= Status | B | I
        		PC <= ($FFFE)

65k

On the 65k, the RS prefix determines the size of the immediate operand, so that the return address that is pushed onto the stack depends on it.

As opposed to the IRQ, the BRK opcode stays in the user resp. hypervisor mode where it is executed.

In hypervisor mode, once the processor configuration register for abort vector table is set, the BRK vector is taken from the abort vector table. For details see the interrupt handling description.

In user mode the BRK always uses the standard two-byte $FFFE IRQ vector, sign-expanded to full address length.

BSR

Branch subroutine - similar to JSR, but use relative addressing similar to branch opcodes

BSR
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x82	65k	AM, RS	Relative (BSR)
	0x44	65k	AM, RS	Relative 16bit (BSR)

Description

Branch to the address given by the operand as computed similar to the branch opcodes. Store the return address (-1) on the stack to prepare for the RTS opcode.

        		Stack(SP--) <= > NextPC-1
        		Stack(SP--) <= < NextPC-1
        		PC <= NextPC + Operand

65k

The AM prefix is evaluated by the relative addressing modes. Note that the RS prefix is used to determine the return address size on the stack, so it cannot be used as parameter width selector. Thus there are two opcodes to define 8-bit or 16-bit parameter width, using the AM prefix to make that 32- or 64-bit respectively.

Note that the UM prefix is not supported.

If the operand is not wide enough as required for an address, it is sign-extended.

The RS prefix determines the width of the return address put on the stack. Note that the BYTE width prefix denotes the natural width of the processor (respectively its current mode). This is the default.

The stack pointer used is the stack pointer of the current mode.

BVC

Branch on overflow clear - take branch when V flag is cleared

BVC
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x50		RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the overflow status flag is clear. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when N=1 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

BVS

Branch on overflow set - take branch when V flag is set

BVS
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x70		RS	Relative

Description

Branch to the address given by adding the parameter to the address of the next operation (after the branch opcode) given the condition that the overflow status flag is set. The parameter is a signed 8-bit value, i.e. jump distances can be from -128 to +127.

        		PC <= NextPC + Operand when N=1 else NextPC

65k

The RS prefix determines the width of the parameter, the default is 8-bit. With a 16-bit parameter the jump distances can be from -32768 to +32767 and so on.

CLC

Clear the C flag

CLC
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x18			Implied

Description

Clear the carry status flag.

CLD

Clear the decimal (D) flag

CLD
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xd8			Implied

Description

Clear the decimal mode status flag.

CLI

Clear the interrupt (I) flag

CLI
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x58			Implied

Description

Clear the interrupt status flag.

65k

Note that the interrupt handling is much more sophisticated in the 65k. In hypervisor mode setting the interrupt status flag disables all interrupts except the non-maskable interrupt. In user mode setting the interrupt status flag disables all "user level interrupts", but hypervisor interrupts are served. The interrupt level for user level interrupts can be configured in a configuration register.

CLV

Clear the overflow (V) flag

CLV
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xb8			Implied

Description

Clear the overflow status flag.

CMP

Compare accumulator with content of memory location

CMP
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xc1		AM, OF, RS, UM, LE	Zeropage indexed with X indirect 16bit
	0xc3	65k	AM, OF, RS, UM, LE	Zeropage indexed with X indirect 64bit
	0xc5		AM, OF, RS, UM, LE	Zeropage
	0xc9		RS, LE	Immediate
	0xcd		AM, OF, RS, UM, LE	Absolute 16bit
	0xd1		AM, OF, RS, UM, LE	Zeropage indirect 16bit indexed with Y
	0xd2	cmos	AM, OF, RS, UM, LE	Zeropage indirect 16bit
	0xd3	65k	AM, OF, RS, UM, LE	Zeropage indirect 64bit indexed with Y
	0xd7	65k	AM, OF, RS, UM, LE	Zeropage indirect 64bit
	0xd5		AM, OF, RS, UM, LE	Zeropage indexed with X
	0xd9		AM, OF, RS, UM, LE	Absolute 16bit indexed with Y
	0xdd		AM, OF, RS, UM, LE	Absolute 16bit indexed with X
EXT	0xc9	65k	RS, UM, LE	E indirect

Description

Compare the operand with the accumulator and set the flags appropriately. I.e. substract the operand from AC with an implicitely set carry in binary mode (even if decimal mode status bit is set), and set the flags from the result.

        		Tmp, C <= Y - Operand, C=1
        		N <= Tmp(7)
        		Z <= Z(Tmp)

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space.

Note that the default is to use BYTE-wide operation without load extension.

CPX

Compare X register with content of memory location

CPX
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xe0		RS, LE	Immediate
	0xe4		AM, OF, RS, UM, LE	Zeropage
	0xec		AM, OF, RS, UM, LE	Absolute 16bit
EXT	0xe0	65k	RS, UM, LE	E indirect

Description

Compare the operand with the X register and set the flags appropriately. I.e. substract the operand from X with an implicitely set carry in binary mode (even if decimal mode status bit is set), and set the flags from the result.

        		Tmp, C <= X - Operand, C=1
        		N <= Tmp(7)
        		Z <= Z(Tmp)

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space.

Note that the default is to use BYTE-wide operation without load extension.

CPY

Compare Y register with content of memory location

CPY
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xc0		RS, LE	Immediate
	0xc4		AM, OF, RS, UM, LE	Zeropage
	0xcc		AM, OF, RS, UM, LE	Absolute 16bit
EXT	0xc0	65k	RS, UM, LE	E indirect

Description

Compare the operand with the Y register and set the flags appropriately. I.e. substract the operand from Y with an implicitely set carry in binary mode (even if decimal mode status bit is set), and set the flags from the result.

        		Tmp, C <= Y - Operand, C=1
        		N <= Tmp(7)
        		Z <= Z(Tmp)

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space.

Note that the default is to use BYTE-wide operation without load extension.

DEC

Decrement the content of a memory location by one

DEC
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xc6		AM, OF, RS, UM, NF	Zeropage
	0x3a	cmos	RS, NF	Accumulator
	0xce		AM, OF, RS, UM, NF	Absolute 16bit
	0xd6		AM, OF, RS, UM, NF	Zeropage indexed with X
	0xde		AM, OF, RS, UM, NF	Absolute 16bit indexed with X
EXT	0xcf	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with Y
EXT	0xcd	65k	RS, UM, NF	E indirect

Description

Decrement the operand by one, i.e. binary substract one. Note this opcode is a read-modify-write opcode and not only has memory-oriented addressing modes but can work on the accumulator alone as well.

        		Operand <= Operand - 1
        		N <= OperandC7)
        		Z <= Z(AC)

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS also determine the width of the operation. There is no LE prefix, as the read and write widths are the same. Note that the default is to use BYTE-wide operation without load extension.

DEX

Decrement the content of the X register by one

DEX
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xca		RS, NF	Implied

Description

Decrement the X register by one (binary).

        	X <= X-1

65k

The RS prefix determines the width of the operation. The NF flag allows to perform the operation without setting flags.

DEY

Decrement the Y register by one

DEY
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x88		RS, NF	Implied

Description

Decrement the Y register by one (binary).

        	Y <= Y-1

65k

The RS prefix determines the width of the operation. The NF flag allows to perform the operation without setting flags.

EOR

Bitwise Exclusive-OR accumulator with content of memory location

EOR
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x41		AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 16bit
	0x43	65k	AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 64bit
	0x45		AM, OF, RS, LE, UM, NF	Zeropage
	0x49		RS, LE, NF	Immediate
	0x4d		AM, OF, RS, LE, UM, NF	Absolute 16bit
	0x51		AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit indexed with Y
	0x52	cmos	AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit
	0x53	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit indexed with Y
	0x55		AM, OF, RS, LE, UM, NF	Zeropage indexed with X
	0x57	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit
	0x59		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with Y
	0x5d		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with X
EXT	0x49	65k	RS, LE, UM, NF	E indirect

Description

Bitwise Exclusive-OR the accumulator with the operand and store back in the accumulator. Set the flags from the result.

        		AC <= AC ^ Operand
        		N <= Tmp(7)
        		Z <= Z(Tmp)

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS and LE together also determine the width of the operation. Note that the default is to use BYTE-wide operation without load extension.

EXT

Extend a value in AC from RS to the full size. Setting LE defines the type of extension.

EXT
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xc4	65k	RS, NF	Accumulator

INC

Increment the content of a memory location by one

INC
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xe6		AM, OF, RS, UM, NF	Zeropage
	0x1a	cmos	RS, NF	Accumulator
	0xee		AM, OF, RS, UM, NF	Absolute 16bit
	0xf6		AM, OF, RS, UM, NF	Zeropage indexed with X
	0xfe		AM, OF, RS, UM, NF	Absolute 16bit indexed with X
EXT	0xef	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with Y
EXT	0xed	65k	RS, UM, NF	E indirect

Description

Increment the operand by one, i.e. binary add one. Note this opcode is a read-modify-write opcode and not only has memory-oriented addressing modes but can work on the accumulator alone as well.

        		Operand <= Operand + 1
        		N <= OperandC7)
        		Z <= Z(AC)

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS also determine the width of the operation. There is no LE prefix, as the read and write widths are the same. Note that the default is to use BYTE-wide operation without load extension.

INV

invert AC, i.e. set AC to the 2s-complement of AC

INV
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xa4	65k	RS, NF	Accumulator

INX

Increment the content of the X register by one

INX
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xe8		RS, NF	Implied

Description

Increment the X register by one (binary).

        	X <= X+1

65k

The RS prefix determines the width of the operation. The NF flag allows to perform the operation without setting flags.

INY

Increment the content of the Y register by one

INY
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xc8		RS, NF	Implied

Description

Increment the Y register by one (binary).

        	Y <= Y+1

65k

The RS prefix determines the width of the operation. The NF flag allows to perform the operation without setting flags.

JMP

Jump to new code address

JMP
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x07	65k	AM, OF, UM, LE	Absolute indirect 64bit
	0x27	65k	AM, OF, UM, LE	Absolute indexed with X indirect 64bit
	0x4c		AM, OF, UM, LE	Address
	0x6c		AM, OF, UM, LE	Absolute indirect 16bit
	0x7c	cmos	AM, OF, UM, LE	Absolute indexed with X indirect 16bit
EXT	0x4c	65k	UM, LE	E indirect
EXT	0x6c		AM, OF, UM, LE	Address Long

Description

Jump to the address given by the operand (as computed depending on the respective addressing mode).

        		PC <= Operand
        		Status |= U when UM is set

65k

The AM, OF, LE and UM prefixes are evaluated by the addressing modes. Note that if UM is set, then the processor jumps into user mode.

If the operand is not as wide as required for an address, it is sign-extended.

JSR

Jump subroutine - jump to a new code location, save return address on stack for RTS

JSR
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x20		AM, OF, RS, LE	Address
EXT	0xdc		AM, OF, RS, LE	Address Long
	0xdc	65k	AM, OF, RS, LE	Absolute indirect 16bit
	0xfc	65k	AM, OF, RS, LE	Absolute indexed with X indirect 16bit
	0x87	65k	AM, OF, RS, LE	Absolute indirect 64bit
	0xa7	65k	AM, OF, RS, LE	Absolute indexed with X indirect 64bit
EXT	0x20	65k	RS, LE	E indirect

Description

Jump to the address given by the operand (as computed depending on the respective addressing mode) and store the return address (-1) on the stack to prepare for the RTS opcode

        		Stack(SP--) <= > NextPC-1
        		Stack(SP--) <= < NextPC-1
        		PC <= Operand

65k

The AM, OF, and LE prefixes are evaluated by the addressing modes. Note that the UM prefix is not supported.

If the operand is not wide enough as required for an address, it is sign-extended.

The RS prefix determines the width of the return address put on the stack. Note that the BYTE width prefix denotes the natural width of the processor (respectively its current mode).

The stack pointer used is the stack pointer of the current mode.

LDA

Load accumulator

LDA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x02	65k	AM, OF, RS, LE, UM, NF	Zeropage indexed with Y
	0x42	65k	AM, OF, RS, LE, UM, NF	Absolute indirect 16bit indexed with Y
	0x47	65k	AM, OF, RS, LE, UM, NF	Absolute indirect 64bit indexed with Y
	0x62	65k	AM, OF, RS, LE, UM, NF	Absolute indexed with X indirect 16bit
	0x67	65k	AM, OF, RS, LE, UM, NF	Absolute indexed with X indirect 64bit
	0xa1		AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 16bit
	0xa3	65k	AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 64bit
	0xa5		AM, OF, RS, LE, UM, NF	Zeropage
	0xa9		RS, LE, NF	Immediate
	0xad		AM, OF, RS, LE, UM, NF	Absolute 16bit
	0xb1		AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit indexed with Y
	0xb2	cmos	AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit
	0xb3	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit indexed with Y
	0xb5		AM, OF, RS, LE, UM, NF	Zeropage indexed with X
	0xb7	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit
	0xb9		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with Y
	0xbd		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with X
EXT	0xa9	65k	RS, LE, UM, NF	E indirect

Description

Read the operand and store it in the Accumulator. Set the flags appropriately.

        		N <= Operand(7)
        		Z <= Z(Operand)
        		Y <= Operand

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. The UM prefix determines whether the operand resides in user space or not.

Note that the default load extension is "zero-extended", to "not surprise" programmers.

The NF prefix lets the flags unmodified.

LDB

Load B with an immediate value

LDB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x59	65k	RS, LE, NF	Immediate

Description

Read the operand and store it in the B register. Set the flags appropriately.

        		N <= Operand(7)
        		Z <= Z(Operand)
        		B <= Operand

65k

The LE and RS prefixes are evaluated by the addressing modes.

Note that the default load extension is "sign-extended".

The NF prefix lets the flags unmodified.

LDE

Load E with an immediate value

LDE
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x39	65k	RS, LE, NF	Immediate

Description

Read the operand and store it in the E register. Set the flags appropriately.

        		N <= Operand(7)
        		Z <= Z(Operand)
        		E <= Operand

65k

The LE and RS prefixes are evaluated by the addressing modes.

Note that the default load extension is "sign-extended".

The NF prefix lets the flags unmodified.

LDX

Load X register

LDX
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xa2		RS, LE, NF	Immediate
	0xa6		AM, OF, RS, LE, UM, NF	Zeropage
	0xae		AM, OF, RS, LE, UM, NF	Absolute 16bit
	0xb6		AM, OF, RS, LE, UM, NF	Zeropage indexed with Y
	0xbe		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with Y
EXT	0xad	65k	RS, LE, UM, NF	E indirect

Description

Read the operand and store it in the X register. Set the flags appropriately.

        		N <= Operand(7)
        		Z <= Z(Operand)
        		X <= Operand

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. The UM prefix determines whether the operand resides in user space or not.

Note that the default load extension is "zero-extended", to "not surprise" programmers.

The NF prefix lets the flags unmodified.

LDY

Load Y register

LDY
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xa0		RS, LE, NF	Immediate
	0xa4		AM, OF, RS, LE, UM, NF	Zeropage
	0xac		AM, OF, RS, LE, UM, NF	Absolute 16bit
	0xb4		AM, OF, RS, LE, UM, NF	Zeropage indexed with X
	0xbc		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with X
EXT	0xa0	65k	RS, LE, UM, NF	E indirect

Description

Read the operand and store it in the Y register. Set the flags appropriately.

        		N <= Operand(7)
        		Z <= Z(Operand)
        		Y <= Operand

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. The UM prefix determines whether the operand resides in user space or not.

Note that the default load extension is "zero-extended", to "not surprise" programmers.

The NF prefix lets the flags unmodified.

LEA

Load Effective Address: compute the effective address and store it in the E (effective Address) register (always full width)

LEA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xf6	65k	AM, OF, UM, NF	Zeropage indexed with Y
EXT	0x61	65k	AM, OF, UM, NF	Absolute indirect 64bit indexed with Y
EXT	0x71	65k	AM, OF, UM, NF	Absolute indexed with X indirect 64bit
EXT	0x21	65k	AM, OF, UM, NF	Absolute indirect 16bit indexed with Y
EXT	0x31	65k	AM, OF, UM, NF	Absolute indexed with X indirect 16bit
EXT	0xa2	65k	AM, OF, UM, NF	Relative
EXT	0xa1	65k	AM, OF, UM, NF	Zeropage indexed with X indirect 16bit
EXT	0x46	65k	AM, OF, UM, NF	Zeropage
EXT	0xae	65k	AM, OF, UM, NF	Absolute 16bit
EXT	0xb1	65k	AM, OF, UM, NF	Zeropage indirect 16bit indexed with Y
EXT	0xb2	65k	AM, OF, UM, NF	Zeropage indirect 16bit
EXT	0x32	65k	AM, OF, UM, NF	Absolute indirect 16bit
EXT	0xf2	65k	AM, OF, UM, NF	Zeropage indirect 64bit
EXT	0x72	65k	AM, OF, UM, NF	Absolute indirect 64bit
EXT	0x56	65k	AM, OF, UM, NF	Zeropage indexed with X
EXT	0xbf	65k	AM, OF, UM, NF	Absolute 16bit indexed with Y
EXT	0xbe	65k	AM, OF, UM, NF	Absolute 16bit indexed with X
EXT	0x22	65k	AM, OF, UM, NF	Relative 16bit
EXT	0xe1	65k	AM, OF, UM, NF	Zeropage indirect 64bit indexed with Y
EXT	0xf1	65k	AM, OF, UM, NF	Zeropage indexed with X indirect 64bit

Description

Load the effective address given by the addressing mode into the E register (without accessing the memory pointed to by the parameter).

        	E <= EffectiveAddress

65k

The value stored in E is always in the natural (full) width of the processor.

The AM and OF prefixes are interpreted as usually when computing the address.

The memory and stack pointers used are the current ones when the user mode prefix is not set. When the user mode prefix is set in hypervisor mode, the memory and stack pointer is that of the user mode. When set in user mode an ABORT is triggered.

With this approach you can use this in trap handling:

        		LEA.U S,$08			; load user space address of offset 8 on the user mode stack
        		LDA.U (E)			; load the value from user space

LSR

Logical Shift Right - shift accumulator one bit to the right, shifting in zero in the highest bit

LSR
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x46		AM, OF, RS, UM, NF	Zeropage
	0x4a		RS, NF	Accumulator
	0x4e		AM, OF, RS, UM, NF	Absolute 16bit
	0x56		AM, OF, RS, UM, NF	Zeropage indexed with X
	0x5e		AM, OF, RS, UM, NF	Absolute 16bit indexed with X
EXT	0x4f	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with Y
EXT	0x4d	65k	RS, UM, NF	E indirect

Description

Shift the operand or accumulator right one bit (i.e. divide by 2). Shift in a zero from the left. The bit shifted out is moved into the carry flag. Note this opcode is a read-modify-write opcode and not only has memory-oriented addressing modes but can work on the accumulator alone as well.

        		C <= AC(0)
        		AC(6-0) <= AC(7-1)
        		AC(7) <= 0
        		N <= AC7)
        		Z <= Z(AC)

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS also determine the width of the operation. There is no LE prefix, as the read and write widths are the same. Note that the default is to use BYTE-wide operation without load extension.

NOP

No operation

NOP
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xea			Implied

Description

No Operation.

ORA

Bitwise OR accumulator with content of memory location

ORA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x01		AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 16bit
	0x03	65k	AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 64bit
	0x05		AM, OF, RS, LE, UM, NF	Zeropage
	0x09		RS, LE, NF	Immediate
	0x0d		AM, OF, RS, LE, UM, NF	Absolute 16bit
	0x11		AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit indexed with Y
	0x12	cmos	AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit
	0x13	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit indexed with Y
	0x15		AM, OF, RS, LE, UM, NF	Zeropage indexed with X
	0x17	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit
	0x19		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with Y
	0x1d		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with X
EXT	0x09	65k	RS, LE, UM, NF	E indirect

Description

Bitwise OR the accumulator with the operand and store back in the accumulator. Set the flags from the result.

        		AC <= AC | Operand
        		N <= Tmp(7)
        		Z <= Z(Tmp)

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS and LE together also determine the width of the operation. Note that the default is to use BYTE-wide operation without load extension.

PEA

Push Effective Address: compute the effective address and push it onto the stack (always full width)

PEA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x41	65k	AM, OF, UM	Absolute indirect 64bit indexed with Y
EXT	0x51	65k	AM, OF, UM	Absolute indexed with X indirect 64bit
EXT	0xd6	65k	AM, OF, UM	Zeropage indexed with Y
EXT	0x01	65k	AM, OF, UM	Absolute indirect 16bit indexed with Y
EXT	0x11	65k	AM, OF, UM	Absolute indexed with X indirect 16bit
EXT	0x82	65k	AM, OF, UM	Relative
EXT	0x81	65k	AM, OF, UM	Zeropage indexed with X indirect 16bit
EXT	0x86	65k	AM, OF, UM	Zeropage
EXT	0xce	65k	AM, OF, UM	Absolute 16bit
EXT	0x91	65k	AM, OF, UM	Zeropage indirect 16bit indexed with Y
EXT	0x92	65k	AM, OF, UM	Zeropage indirect 16bit
EXT	0x12	65k	AM, OF, UM	Absolute indirect 16bit
EXT	0xd2	65k	AM, OF, UM	Zeropage indirect 64bit
EXT	0x52	65k	AM, OF, UM	Absolute indirect 64bit
EXT	0x96	65k	AM, OF, UM	Zeropage indexed with X
EXT	0xdf	65k	AM, OF, UM	Absolute 16bit indexed with Y
EXT	0xde	65k	AM, OF, UM	Absolute 16bit indexed with X
EXT	0x02	65k	AM, OF, UM	Relative 16bit
EXT	0xc1	65k	AM, OF, UM	Zeropage indirect 64bit indexed with Y
EXT	0xd1	65k	AM, OF, UM	Zeropage indexed with X indirect 64bit

Description

Push the effective address given by the addressing mode onto the stack (without accessing the memory pointed to by the parameter).

        	Stack(SP--) <= >EffectiveAddress
        	Stack(SP--) <= <EffectiveAddress

65k

The value pushed is always in the natural (full) width of the processor.

The AM and OF prefixes are interpreted as usually when computing the address.

Note that the stack used to actually store the address is always (no matter the user mode bit) the current stack!

PHA

Push contents of the accumulator onto the stack

PHA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x48		RS, UM	Implied

Description

Push the content of the accumulator on the stack.

        		Stack(SP--) <= A

65k

The RS prefix determines the width of the accumulator value as written on the stack.

The stack pointer used is the one of the current stack if the UM prefix is not set. If UM is set and the opcode is executed in hypervisor mode, the stack pointer used is the user mode stack pointer and the value is stored in user mode memory. If executed in user mode with UM set an ABORT exception is triggered.

PHB

Push B onto stack (full width)

PHB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x48	65k	UM	Implied

Description

Push the content of the B register on the stack.

        		Stack(SP--) <= B

65k

The value stored is always in the natural width of the processor (mode).

PHE

Push E onto stack (always full width)

PHE
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x08	65k	UM	Implied

Description

Push the content of the E register on the stack.

        		Stack(SP--) <= E

65k

The value stored is always in the natural width of the processor (mode).

PHP

Push processor status register onto the stack

PHP
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x08		UM, RS	Implied

Description

Push the standard status register on the stack.

        		Stack(SP--) <= Status

65k

The not-extended bit is set (so the status is compatible with the 6502 and would denote a standard stack frame) as long as RS is 00.

If RS indicates a word-wide push, the G and OE flags of the extended status registers are pushed (with all other bits zero) before the standard status register. The standard status register has the not-extended bit cleared in this case.

RS set to long or quad lengths are illegal and trap into an ABORT.

PHX

Push contents of the X register onto the stack

PHX
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xda	cmos	RS, UM	Implied

Description

Push the content of the X register on the stack.

        		Stack(SP--) <= X

65k

The RS prefix determines the width of the accumulator value as written on the stack.

PHY

Push contents of the Y register onto the stack

PHY
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x5a	cmos	RS, UM	Implied

Description

Push the content of the Y register on the stack.

        		Stack(SP--) <= Y

65k

The RS prefix determines the width of the accumulator value as written on the stack.

PLA

Pull the contents of the accumulator from the stack

PLA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x68		RS, LE, UM, NF	Implied

Description

Pull the value of the accumulator from the stack.

        		A <= Stack(++SP)

65k

The RS prefix determines the width of the accumulator value as written on the stack.

PLB

Pull E from stack (full width)

PLB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x68	65k	UM, NF	Implied

Description

Pull the value of the B register from the stack.

        	B <= Stack(++SP)

65k

The value retrieved is always in the natural width of the processor (mode).

PLE

Pull E from stack (full width)

PLE
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x28	65k	UM, NF	Implied

Description

Pull the value of the E register from the stack.

        		E <= Stack(++SP)

65k

The value retrieved is always in the natural width of the processor (mode).

PLP

Pull processor status register from the stack

PLP
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x28			Implied

Description

Pull the standard status register on the stack.

        		Status <= Stack(++SP)

65k

When the status register has bit 5 (the not-extended bit) set, then PLP reads the standard status register only.

When the status register has bit 5 cleared, it reads a second byte from the stack and restores the G and OE flags from that byte into the extended status register. (Note that this introduces a slight incompatibility with the 6502. So this behaviour may change to require the RS width set to word.)

PLX

Pull the contents of the X register from the stack

PLX
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xfa	cmos	RS, LE, UM, NF	Implied

Description

Pull the value of the X register from the stack.

        		X <= Stack(++SP)

65k

The RS prefix determines the width of the accumulator value as written on the stack.

PLY

Pull the contents of the Y register from the stack

PLY
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x7a	cmos	RS, LE, UM, NF	Implied

Description

Pull the value of the Y register from the stack.

        		Y <= Stack(++SP)

65k

The RS prefix determines the width of the accumulator value as written on the stack.

PRB

Push and Replace Base register: Push base offset register to the stack, then transfer accumulator to the base register

PRB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x58	65k	UM, NF	Implied

RDL

Rotate Direct Left - similar to ROL, but do not shift in carry, but the highest bit of the original value

RDL
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x26	65k	AM, OF, RS, UM, NF	Zeropage
EXT	0x2a	65k	RS, NF	Accumulator
EXT	0x2e	65k	AM, OF, RS, UM, NF	Absolute 16bit
EXT	0x36	65k	AM, OF, RS, UM, NF	Zeropage indexed with X
EXT	0x3e	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with X
EXT	0x3f	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with Y
EXT	0x3d	65k	RS, UM, NF	E indirect

Description

Shift the operand or accumulator left one bit (i.e. multiply by 2). Shift in the sign (uppermost bit) of the original value from the right. The bit shifted is also moved into the carry flag. Note this opcode is a read-modify-write opcode and not only has memory-oriented addressing modes but can work on the accumulator alone as well.

        		C <= AC(7)
        		AC(7-1) <= AC(6-0)
        		AC(0) <= C
        		N <= AC7)
        		Z <= Z(AC)

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS also determine the width of the operation. There is no LE prefix, as the read and write widths are the same. Note that the default is to use BYTE-wide operation without load extension.

RDR

Rotate Direct Right - similar to ROR, but do not shift in carry, but the lowest bit of the original value

RDR
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x66	65k	AM, OF, RS, UM, NF	Zeropage
EXT	0x6a	65k	RS, NF	Accumulator
EXT	0x6e	65k	AM, OF, RS, UM, NF	Absolute 16bit
EXT	0x76	65k	AM, OF, RS, UM, NF	Zeropage indexed with X
EXT	0x7e	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with X
EXT	0x7f	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with Y
EXT	0x7d	65k	RS, UM, NF	E indirect

Description

Shift the operand or accumulator right one bit (i.e. divide by 2). Shift in bit 0 (lowermost bit) of the original value from the left. The bit shifted is also moved into the carry flag. Note this opcode is a read-modify-write opcode and not only has memory-oriented addressing modes but can work on the accumulator alone as well.

        		C <= AC(0)
        		AC(6-0) <= AC(7-1)
        		AC(7) <= C
        		N <= AC7)
        		Z <= Z(AC)

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS also determine the width of the operation. There is no LE prefix, as the read and write widths are the same. Note that the default is to use BYTE-wide operation without load extension.

ROL

Rotate Left - shift accumulator one bit to the left, shifting in the carry flag in bit 0, and shifting the highest bit into the carry flag instead.

ROL
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x26		AM, OF, RS, UM, NF	Zeropage
	0x2a		RS, NF	Accumulator
	0x2e		AM, OF, RS, UM, NF	Absolute 16bit
	0x36		AM, OF, RS, UM, NF	Zeropage indexed with X
	0x3e		AM, OF, RS, UM, NF	Absolute 16bit indexed with X
EXT	0x2f	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with Y
EXT	0x2d	65k	RS, UM, NF	E indirect

Description

Shift the operand or accumulator left one bit (i.e. multiply by 2). Shift in the carry flag from the right. The bit shifted out is moved into the carry flag. Note this opcode is a read-modify-write opcode and not only has memory-oriented addressing modes but can work on the accumulator alone as well.

        		Tmp <= AC(7)
        		AC(7-1) <= AC(6-0)
        		AC(0) <= C
        		C <= Tmp
        		N <= AC7)
        		Z <= Z(AC)

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS also determine the width of the operation. There is no LE prefix, as the read and write widths are the same. Note that the default is to use BYTE-wide operation without load extension.

ROR

Rotate Right - shift accumulator one bit to the right, shifting in the carry flag in the highest bit, and shifting bit 0 into the carry flag instead.

ROR
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x66		AM, OF, RS, UM, NF	Zeropage
	0x6a		RS, NF	Accumulator
	0x6e		AM, OF, RS, UM, NF	Absolute 16bit
	0x76		AM, OF, RS, UM, NF	Zeropage indexed with X
	0x7e		AM, OF, RS, UM, NF	Absolute 16bit indexed with X
EXT	0x6f	65k	AM, OF, RS, UM, NF	Absolute 16bit indexed with Y
EXT	0x6d	65k	RS, UM, NF	E indirect

Description

Shift the operand or accumulator right one bit (i.e. divide by 2). Shift in the carry flag from the left. The bit shifted out is moved into the carry flag. Note this opcode is a read-modify-write opcode and not only has memory-oriented addressing modes but can work on the accumulator alone as well.

        		Tmp <= AC(0)
        		AC(6-0) <= AC(7-1)
        		AC(7) <= C
        		C <= Tmp
        		N <= AC7)
        		Z <= Z(AC)

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS also determine the width of the operation. There is no LE prefix, as the read and write widths are the same. Note that the default is to use BYTE-wide operation without load extension.

RTI

Return from interrupt

RTI
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x40			Implied

Description

Returns from an interrupt or a BRK opcode handling. It first pulls the status register from the stack, then takes the return address from the stack, increment it by one, and continue at the new address.

        		Status <= Stack(++SP)		-- bit 5=1
        		Tmp(0-7) <= Stack(++SP)
        		Tmp(8-15) <= Stack(++SP)
        		PC <= Tmp;

65k

The RTI prefix first reads the status from the current stack. If the "Not extended" flag is set (bit 5 is always 1 in the 6502 status register, so here it is used as "not extended" flag), then the normal handling as described above takes place.

If the "not extended" flag is clear, i.e. an extended stack frame is used:

        		Status <= Stack(++SP)		-- bit 5=0
        		ExtStatus <= Stack(++SP)
        		Tmp(0-7) <= Stack(++SP)
        		Tmp(8-15) <= Stack(++SP)
        		...
        		PC <= Tmp;

Here the extended status byte is pulled from the stack after the standard status. In this extended status there are two bit that determine the size of the return address following on the stack. So the return address can be 16-, 32- or 64-bit. Note that the "00" designation (otherwise used for BYTE width) maps to the natural address width of the processor executing the code.

Also the user mode bit is stored in the extended stack frame. If the user mode bit is the same as the current mode, the execution continues in that mode. If the RTI code is executed in the supervisor mode, and the user mode bit is set, then the return address is interpreted as user mode address, and the execution continues in the user mode. If RTI is executed in user mode, and the user mode bit is clear (i.e. hypervisor mode), and ABORT sequence is triggered.

Note that the "natural" address width is taken from the target environment in case the process jumps from hypervisor to user mode.

If the operand is not wide enough as required for an address, it is sign-extended.

RTS

Return from subroutine - read return address from stack

RTS
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x60		RS	Implied

Description

Take the return address from the stack, increment it by one, and continue at the new address.

        		Tmp(0-7) <= Stack(++SP)
        		Tmp(8-15) <= Stack(++SP)
        		PC <= Tmp + 1;

65k

The RS prefix determines the width of the return address read from the stack. Note that the BYTE width prefix denotes the natural width of the processor (respectively its current mode). This is the default.

If the operand is not wide enough as required for an address, it is extended with the rest of the current PC. This is to support running "narrow" code within a e.g. a 64k window in a wide system.

The stack pointer used is the stack pointer of the current mode.

RTU

Return from trap handler.

RTU
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
SYS	0x60	65k		Immediate

Description

Return from trap handling. Reads the extended status byte and the return address from hypervisor stack, then jumps to the return address.

        		<Tmp <= Stack(++SP)
        		>Tmp <= Stack(++SP)
        		Tmp <= Tmp+1
        		PC <= Tmp;
        		ExtStatus <= Stack(++SP)

65k

The extended status byte contains the width bits for the return address as well as the user mode bit from where the trap came. In RTU the user mode bit is restored, so the RTU opcode can return to user as well as hypervisor mode.

The stack pointer used is that of the hypervisor stack.

Note for future expansions the RS prefix may extend the number of traps to word, or even wider widths.

When executed in user mode, this opcode triggers an ABORT exception.

SAB

Swap A register with B register. Always done full width, no flags set.

SAB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xa8	65k		Implied

SAE

Swap AC with E register. Always done full width, no flags set.

SAE
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xd8	65k		Implied

SAX

Swap AC with X register. Always done full width, no flags set.

SAX
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xba	65k		Implied

SAY

Swap AC with Y register. Always done full width, no flags set.

SAY
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xda	65k		Implied

SBB

Substract value from B register

SBB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xe5	65k	RS, LE, NF	Immediate
EXT	0xf5	65k	RS, NF	Accumulator

SBC

Substract content of memory location from accumulator

SBC
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xe1		AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 16bit
	0xe3	65k	AM, OF, RS, LE, UM, NF	Zeropage indexed with X indirect 64bit
	0xe5		AM, OF, RS, LE, UM, NF	Zeropage
	0xe9		RS, LE, NF	Immediate
	0xed		AM, OF, RS, LE, UM, NF	Absolute 16bit
	0xf1		AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit indexed with Y
	0xf2	cmos	AM, OF, RS, LE, UM, NF	Zeropage indirect 16bit
	0xf3	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit indexed with Y
	0xf5		AM, OF, RS, LE, UM, NF	Zeropage indexed with X
	0xf7	65k	AM, OF, RS, LE, UM, NF	Zeropage indirect 64bit
	0xf9		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with Y
	0xfd		AM, OF, RS, LE, UM, NF	Absolute 16bit indexed with X
EXT	0xe9	65k	RS, LE, UM, NF	E indirect

Description

Substract the operand from the accumulator and store back in the accumulator. Set the flags from the result. Use Decimal or Binary add depending on whether the decimal mode status bis is set or not respectively. C status flag is used as borrow.

        		AC, C, V <= AC - Operand, C
        		N <= Tmp(7)
        		Z <= Z(Tmp)

For a handling of the V-flag please see http://www.6502.org/tutorials/vflag.html.

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS and LE together also determine the width of the operation. Note that the default is to use BYTE-wide operation without load extension.

SBE

Add value to E register

SBE
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xa5	65k	RS, LE, NF	Immediate
EXT	0xb5	65k	RS, NF	Accumulator

SBS

Substract value from stack pointer

SBS
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xc5	65k	RS, LE, NF	Immediate
EXT	0xd5	65k	RS, NF	Accumulator

SEB

Swap E register with B register. Always done full width, no flags set.

SEB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xb8	65k		Implied

SEC

Set the C flag

SEC
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x38			Implied

Description

Set the carry status flag.

SED

Set the decimal (D) flag

SED
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xf8			Implied

Description

Set the decimal mode status flag.

SEI

Set the interrupt (I) flag

SEI
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x78			Implied

Description

Set the interrupt status flag.

65k

STA

Store the content of the accumulator into a memory location

STA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x22	65k	AM, OF, RS, UM	Zeropage indexed with Y
	0x81		AM, OF, RS, UM	Zeropage indexed with X indirect 16bit
	0x83	65k	AM, OF, RS, UM	Zeropage indexed with X indirect 64bit
	0x85		AM, OF, RS, UM	Zeropage
	0x8d		AM, OF, RS, UM	Absolute 16bit
	0x91		AM, OF, RS, UM	Zeropage indirect 16bit indexed with Y
	0x92	cmos	AM, OF, RS, UM	Zeropage indirect 16bit
	0x93	65k	AM, OF, RS, UM	Zeropage indirect 64bit indexed with Y
	0x95		AM, OF, RS, UM	Zeropage indexed with X
	0x97	65k	AM, OF, RS, UM	Zeropage indirect 64bit
	0x99		AM, OF, RS, UM	Absolute 16bit indexed with Y
	0x9d		AM, OF, RS, UM	Absolute 16bit indexed with X
	0xc2	65k	AM, OF, RS, UM	Absolute indirect 16bit indexed with Y
	0xc7	65k	AM, OF, RS, UM	Absolute indirect 64bit indexed with Y
	0xe2	65k	AM, OF, RS, UM	Absolute indexed with X indirect 16bit
	0xe7	65k	AM, OF, RS, UM	Absolute indexed with X indirect 64bit
EXT	0x8d	65k	RS, UM	E indirect

Description

Store the accumulator into the address given by the operand.

        		Operand <= A

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space.

RS also determine the width of the operation. Note that the default is to use BYTE-wide operation without load extension.

STX

Store the content of the X register to memory.

STX
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x86		AM, OF, RS, UM	Zeropage
	0x8e		AM, OF, RS, UM	Absolute 16bit
	0x96		AM, OF, RS, UM	Zeropage indexed with Y
EXT	0xaf	65k	AM, OF, RS, UM	Absolute 16bit indexed with Y
EXT	0x9d	65k	RS, UM	E indirect

Description

Store the content of the X register into the address given by the operand.

        		Operand <= A

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space.

RS also determine the width of the operation. Note that the default is to use BYTE-wide operation without load extension.

STY

Store the content of the Y register to memory.

STY
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x84		AM, OF, RS, UM	Zeropage
	0x8c		AM, OF, RS, UM	Absolute 16bit
	0x94		AM, OF, RS, UM	Zeropage indexed with X
EXT	0x8f	65k	AM, OF, RS, UM	Absolute 16bit indexed with X
EXT	0x8c	65k	RS, UM	E indirect

Description

Store the content of the Y register into the address given by the operand.

        		Operand <= A

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space.

RS also determine the width of the operation. Note that the default is to use BYTE-wide operation without load extension.

STZ

Store zero into a memory location

STZ
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x64	cmos	AM, OF, RS, UM	Zeropage
	0x74	cmos	AM, OF, RS, UM	Zeropage indexed with X
	0x9c	cmos	AM, OF, RS, UM	Absolute 16bit
	0x9e	cmos	AM, OF, RS, UM	Absolute 16bit indexed with X
EXT	0x9e	65k	AM, OF, RS, UM	Absolute 16bit indexed with Y
EXT	0x9c	65k	RS, UM	E indirect

Description

Store the zero into the address given by the operand.

        		Operand <= 0

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space.

RS also determine the width of the operation. Note that the default is to use BYTE-wide operation without load extension.

SUB

Substract content of memory location from accumulator without using the carry flag as input

SUB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x85		RS, LE, NF	Immediate
EXT	0x80	65k	RS, LE, UM, NF	E indirect

Description

Substract the operand from the accumulator and store back in the accumulator. Set the flags from the result. Use Binary mode add only. C status flag is not used as input, but set as borrow from the result.

        		AC, C, V <= AC - Operand
        		N <= Tmp(7)
        		Z <= Z(Tmp)

For a handling of the V-flag please see http://www.6502.org/tutorials/vflag.html.

65k

The AM, OF, LE and RS prefixes are evaluated by the addressing modes. UM determines whether the operand is in user space. NF allows to not set the flags.

RS and LE together also determine the width of the operation. Note that the default is to use BYTE-wide operation without load extension.

SWP

swap upper and lower part nibble / byte / word / long word of a byte / word / long / quad (longlong) operand in Accumulator

SWP
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xd4	65k	RS, NF	Accumulator

SXY

Swap X with Y register. Always done full width, no flags set.

SXY
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x9a	65k		Implied

TAB

Transfer AC to B register

TAB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xe8	65k	NF, LE, RS	Implied

TAE

Transfer AC to E register

TAE
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x88	65k	NF, LE, RS	Implied

TAX

Transfer the contents of accumulator into the X register

TAX
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xaa		RS, LE, NF	Implied

Description

Transfer the value of the accumulator to the X register

        	X <= A

65k

The RS and LE prefixes determines the width of the operation. LE determines how to extend the value loaded to the full (natural) width. The NF flag allows to perform the operation without setting flags.

TAY

Transfer the contents of accumulator into the Y register

TAY
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xa8		RS, LE, NF	Implied

Description

Transfer the value of the accumulator to the Y register

        	Y <= A

65k

TBA

Transfer base register B to Accumulator

TBA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xf8	65k	NF	Implied

TBE

Transfer content of B register into E register (full width)

TBE
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xfa	65k	NF	Implied

TEA

Transfer E register to Accumulator

TEA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x98	65k	NF	Implied

TEB

Transfer E to B register (full width)

TEB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xea	65k	NF	Implied

TPA

Transfer Program counter to Accumulator

TPA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xc8	65k	NF	Implied

TRB

Test and Reset Bit - AND the memory location with the accumulator, and set the Z flag from the result, then CLEAR all bits in the memory location that are set in the accumulator.

TRB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x14	cmos	AM, OF, RS, UM, NF	Zeropage
	0x1c	cmos	AM, OF, RS, UM, NF	Absolute 16bit
EXT	0x1c	65k	RS, UM, NF	E indirect

Description

Take the operand, and AND it with the accumulator and evaluate the Z-flag. Then clear all bits in the operand that are set in the accumulator (basically AND with the inverse of the accumulator), and store the value back.

The use case for this opcode is the synchronization between processes and implements a variant of the "test-and-clear" primitive. Thus this is a Read-Modify-Write operation and will trigger a Memory-Lock between the read and write to make that operation atomic.

        		Tmp <= operand & AC 
        		Z <= Z(Tmp)
        		operand < operand | AC

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. The UM prefix determines whether the operand resides in user space or not.

The NF prefix allows to implement a read-modify-write AND of a memory location (without the usual and/store sequence) - without setting a flag though.

TRP

Trap into 65k supervisor mode

TRP
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xf4	65k		Immediate

Description

Trap into supervisor mode. Pushes the return address and the extended status byte on the hypervisor stack and jumps into hypervisor mode, using the appropriate trap vector. To return from the trap, the RTU operations is used. For compatibility with RTS, the return address minus one is stored on the stack.

        		Stack(SP--) <= > NextPC-1
        		Stack(SP--) <= < NextPC-1
        		Stack(SP--) <= ExtStatus
        		PC <= TrapVector(Operand)

65k

The address put on the stack always has the natural width of the processor. Currently no further prefix is supported. The stack pointer used is that of the hypervisor stack.

This opcode can be used in user mode as well as in hypervisor mode. The extended status byte contains the user mode bit, so that the RTU opcode knows whether to return to user mode or hypervisor mode.

The extendend status byte also contains width bits that store the width of the return address on stack. BYTE is not used, but the real width is stored with the width bits.

Note for future expansions the RS prefix may extend the trap number (the immediate operand) to word, or even wider widths.

TSB

Test and Set Bit - AND the memory location with the accumulator, and set the Z flag from the result, then SET all bits in the memory location that are set in the accumulator.

TSB
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x04	cmos	AM, OF, RS, UM, NF	Zeropage
	0x0c	cmos	AM, OF, RS, UM, NF	Absolute 16bit
EXT	0x0c	65k	RS, UM, NF	E indirect

Description

Take the operand, and AND it with the accumulator and evaluate the Z-flag. Then OR the operand with the accumulator and store the value back.

The use case for this opcode is the synchronization between processes and implements a variant of the "test-and-set" primitive. Thus this is a Read-Modify-Write operation and will trigger a Memory-Lock between the read and write to make that operation atomic.

        		Tmp <= operand & AC 
        		Z <= Z(Tmp)
        		operand < operand | AC

65k

The AM, OF and RS prefixes are evaluated by the addressing modes. The UM prefix determines whether the operand resides in user space or not.

The NF prefix allows to implement a read-modify-write OR of a memory location (without the usual or/store sequence) - without setting a flag though.

TSX

Transfer the contents of the stack pointer into the X register (Note: needs RS to keep compatibility with 6502)

TSX
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0xba		UM, NF, RS, LE	Implied

Description

Transfer the value of the stack pointer to the X register

        	X <= S

65k

The stack pointer used is the current stack pointer. If the user mode bit is set in hypervisor mode, the stack pointer used is the user mode stack pointer. If the user mode bit is set in user mode, an ABORT exception is triggered.

TSY

Transfer stack pointer to Y

TSY
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0xca	65k	NF, UM, RS, LE	Implied

TXA

Transfer the contents of the X register into the accumulator

TXA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x8a		RS, LE, NF	Implied

Description

Transfer the value of the X register to the accumulator

        	A <= X

65k

TXS

Transfer the contents of X register into the stack pointer (Note: needs RS to keep compatibility with 6502)

TXS
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x9a		RS, LE, UM	Implied

Description

Transfer the value of the X register to the stack pointer.

        	S <= X

65k

TYA

Transfer the contents of the Y register into the accumulator

TYA
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
	0x98		RS, LE, NF	Implied

Description

Transfer the value of the Y register to the accumulator

        	A <= Y

65k

TYS

Transfer Y to stack pointer

TYS
Page	Opcode	Class	Prefixes	Addressing Mode	Syntax
EXT	0x8a	65k	LE, RS, UM	Implied

Disclaimer

All Copyrights are acknowledged. The information here is provided under the terms as described in the license section.

Last updated 2012-04-23. Last modified: 2013-11-17

65002 Operation Documentation

List of operations

ADB

ADC

Description

65k

ADD

Description

65k

ADE

ADS

AND

Description

65k

ASL

Description

65k

ASR

Description

65k

BCC

Description

65k

BCN

BCS

Description

65k

BEQ

Description

65k

BEV

Description

65k

BGES

Description

65k

BGT

Description

65k

BGTS

Description

65k

BIT

Description

65k

BLE

Description

65k

BLES

Description

65k

BLTS

Description

65k

BMI

Description

65k

BNE

Description

65k

BOD

Description

65k

BPL

Description

65k

BRA

Description

65k

BRK

Description

65k

BSR

Description

65k

BVC

Description

65k

BVS

Description