TX description

The 74LS163/74HCT163 is a 4 Bit synchronous counter.
There are three pins of interest when it comes to counting:
ENP and ENT inputs have to be 1 to enable the counter
(to make it increment at the rising edge on CLK).

The RCO output goes 1, if ENT = 1 and all four counter Bits are 1
(if the counter is in state '15' that is),
a feature intended to wire some of those counters together
for counting more than 4 Bits...

So if the counter has a random value after power_on,
it always will stop counting when it reaches 15 after
a few clock cycles.

If /LD is low during a rising edge on CLK, the counter
is loaded with a value (6 for example), and will increment
until it reaches 15 again.

The 74LS166/74HCT166 is an 8 Bit shift register with a
synchronous load, means that if /LD = 0, a rising edge
on CLK will load an 8 Bit value into the register.
When /LD = 1, the register does a 'shift left'.

Two 74166s are wired together to work as a 16 Bit shift register,
although not all of the Bits are used...
The serial input is always set to 1, so after a few clock cycles
with /LD = 1, the output of the 16 Bit shift register will go 1,
what is default for an inactive TX line.

Now to transmit the first Byte:

The CPU or microcontroller in control of this UART
writes a Byte into the 'transmit hold register' with a
low_active write_enable:
A rising edge on /WTX loads said register,
and sets the TX_start flipflop to 1...

The flipflop_output stays 1, until the Byte is transferred
into the TX shift register.
If the counter is in state 15, what means TX is inactive
(or transmitting the Stop Bit that marks the end of the transmission),
/LD is pulled low, so that the counter and the TX shift registers
are loaded and the transmission starts.

Actually, we are loading a 9 Bit word into the 16 Bit shift register:
one leading Start Bit that always is 0,
and 8 Data Bits.
All unused Bits are set to 1 to work as 'Stop Bits'.

Since we're loading a value of 6 into the counter, the uppermost
counter output QD goes 0
when the transmission starts...
so we use a falling edge on that output to clear/reset the TX_start
flipflop (by using a R/C differentiator as mentioned in some old TI
application notes), and our UART is ready again to get another Byte
written into the 'transmit hold register'...

What sets the TX_start flipflop, waiting for the next Stop Bit.

Then the whole game starts again, and that's all there is to it.

An application note for building a differentiator mentions, that
R should be 2 to 5 kOhm, and that R*C should be 1 us or less.

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