André 's 8-bit Sneak Preview
(C) - André Fachat
I have decided to go a bit more public with my currently planned projects. So this is my "sneak preview" page with what I have in mind. for my 8-bit projects... Don't actually expect me to get anything of this finished soon...
Table of content
The operating system needs a definitive overhaul. These are the things to do:
- no-copy (where possible) block transfer replacement for the streams API
- support for the 65816 boards I recently did
- support for Ethernet and USB devices, ethernet using the uIP stac
- support for cc65 C-based programs
I have done some work on understanding vintage floppy controllers - see Notes on floppies for some insights.
My current CS/A projects...
PETCPU board
During my tests for the PET816 board in the PETCPU board, I found timing issues between the PETCPU and VDC boards. Need to fixup the PETCPU board. Somewhat embarassing that this appears only now, but my newer designs hopefully are of better quality...
Well, I bought me a XS1541 and I plan to replace my lptieee board (which is currently broken) with it. However, I need to create a new firmware for the XS1541 to provide the lptieee functionality...
I have worked on the XD2031 firmware that works - but also still is a work in progress....
The 65k Project
I'm working on a design for an FPGA-based 6502 CPU replacement, named '65k'. I chose this name to honor that the design numbers have 5 digits instead of 4, but still starting with 65 as the 6502.
I have already started that project with the 65k pages
Netusb2
As successor to my netusb board I have designed a netusb2 board. It's using 3.3V components communicating via an SPI interface. I have created the board, and the SPI65/B solution from this board is already on this web site. It has an SD-card slot, an ENC28J60-based Ethernet interface, and an SPI-based USB host and device interface. SD-card already works, Ethernet is being tested right now, USB is untested so far...
See the NetUSB board for it.
Blitter
I have created a first design for a block-transfer-engine (usually called a 'blitter'). The problem is that the design had everything explicitely, like adder/incrementer separately for source and target address. The whole first layout draft took full two pages of a eurocard (160x100mm) - SMD!
I have redesigned the blitter using a design approach similar to a CPU - with registers and a single ALU to add the address increment for both, source and target addresses. The first layout draft fits well on a single side of a eurocard, although still all SMD (except two GALs used as "microcode"...). The control logic still has to be designed, but I think it'll fit one eurocard side.
Netusb
I have made a design for a board with a CS8900A ethernet controller, as well as two USB controllers - one as host, one as device. Currently struggeling to solder the 100 pin TQFP ethernet controller...
65816 CPU board
After designing and testing the PET816 board (65816 CPU board for the CBM PETs or other 6502 computers) I decided to adapt the CPLD code to be compatible with the PET816 board - more features and common drivers are easier to do.
Done :-)
CS/A CPU on 2MHz
During my tests for the PET816 board in a 2MHz CS/A computer, I found timing issues with the 2MHz mode - need to be figured out. Somewhat embarassing that this appears only now, but my newer designs hopefully are of better quality...
Done :-)
Olimex Ethernet board
I have made a design for a board with the Olimex Ethernet controller board - basically similar to the Netusb board, but needing voltage converters as the Olimex parts is only available in 3.3V... Board and parts are here, but nothing done yet...
Done :-)
Web design overhaul
As you can see, this part is done as of June 5th 2010 :-)
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Last modified: 2019-08-30