Signal Name Total Product Terms Product Terms Location Power Mode Pin Number PinType Pin Use
Mytiming/clkcounter<0> 7  18_2 18_3 1_1 1_2 1_2 1_3 1_5 MC1 STD   (b) (b)
Mytiming/clkcounter<2> 8  2_1 2_1 2_2 2_3 2_4 3_1 3_2 3_3 MC2 STD 1 I/O I
(unused) 0   MC3   2 I/O I
(unused) 0   MC4     (b)  
MyClock/phi0D3 1  5_1 MC5 STD 3 I/O I
MyClock/phi0D2 1  6_1 MC6 STD 4 I/O I
MyClock/phi0D1 1  7_1 MC7 STD   (b) (b)
$OpTx$FX_DC$98 1  8_1 MC8 STD 5 I/O I
cpuclk 1  9_1 MC9 STD 6 I/O O
$OpTx$FX_DC$97 1  10_1 MC10 STD   (b) (b)
nslowdataenout 2  11_1 11_2 MC11 STD 7 I/O O
masterclk 2  12_1 12_2 MC12 STD 9 I/O/GCK1 GCK/I
BUF_masterclk 2  13_1 13_2 MC13 STD   (b) (b)
Mytiming/clkcounter<3> 7  13_3 13_4 14_1 14_2 14_3 14_4 14_5 MC14 STD 10 I/O/GCK2 GCK
Mytiming/clkcounter<1> 7  15_1 15_1 15_2 15_3 15_5 16_2 16_3 MC15 STD 11 I/O I
phi2 1  16_1 MC16 STD 12 I/O/GCK3 O
masterclk/masterclk_RSTF 1  17_1 MC17 STD 13 I/O I
fastclkby2 1  18_1  MC18 STD   (b) (b)

Signals Used By Logic in Function Block
  1. $OpTx$FX_DC$97
  2. $OpTx$FX_DC$98
  3. BUF_masterclk
  4. MyClock/phi0D1
  5. MyClock/phi0D2
  6. Mytiming/clkcounter<0>
  7. Mytiming/clkcounter<1>
  8. Mytiming/clkcounter<2>
  9. Mytiming/clkcounter<3>
  10. clkenable
  11. clklatchx<0>/clklatchx<0>_D2
  12. clklatchx<1>/clklatchx<1>_D2
  13. clklatchx<2>/clklatchx<2>_D2
  14. clklatchx<3>/clklatchx<3>_D2
  15. clklatchx<4>/clklatchx<4>_D2
  16. latchen
  17. masterclk
  18. masterclk/masterclk_RSTF
  19. nslowdataen
  20. phi0
  21. reset