Signal Name | Total Product Terms | Product Terms | Location | Power Mode | Pin Number | PinType | Pin Use |
---|---|---|---|---|---|---|---|
MyClock/phi0D5 | 2 | 1_1 1_2 | MC1 | STD | (b) | (b) | |
nslowbusclr | 1 | 2_1 | MC2 | STD | 32 | I/O | O |
rnw | 1 | 3_1 | MC3 | STD | 33 | I/O | O |
(unused) | 0 | MC4 | (b) | ||||
(unused) | 0 | MC5 | 34 | I/O | |||
(unused) | 0 | MC6 | 35 | I/O | |||
fastclkbydiv/fastclkbydiv_RSTF__$INT | 1 | 7_1 | MC7 | STD | (b) | (b) | |
cpuclk_OBUF/cpuclk_OBUF_D2__$INT | 1 | 8_1 | MC8 | STD | 36 | I/O | (b) |
slowaccess/slowaccess_RSTF | 2 | 9_1 9_2 | MC9 | STD | 37 | I/O | (b) |
extclkdel | 2 | 10_1 10_2 | MC10 | STD | (b) | (b) | |
MyClock/phi0D4 | 2 | 11_1 11_2 | MC11 | STD | 39 | I/O | I |
(unused) | 0 | MC12 | 40 | I/O | (b) | ||
(unused) | 0 | MC13 | (b) | (b) | |||
nramcs<0> | 16 | 12_1 12_2 12_3 12_4 12_5 13_1 13_2 13_3 13_4 13_5 14_1 14_2 14_3 14_4 14_5 15_5 | MC14 | STD | 41 | I/O | O |
nramcs<1> | 6 | 15_1 15_2 15_3 15_4 16_4 16_5 | MC15 | STD | 43 | I/O | O |
validaddrdel | 3 | 16_1 16_2 16_3 | MC16 | STD | (b) | (b) | |
clocked_rnw | 3 | 17_1 17_2 17_3 | MC17 | STD | 44 | I/O | (b) |
isorigdel | 6 | 18_1 18_2 18_3 18_4 18_5 1_3 | MC18 | STD | (b) | (b) |