CS/A65 computer - Caspaer and Gecko

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  2024-02-15 Added the PETIO 1.3B revision.
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  2024-02-03 Added the IEC and UART I/O output board.
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  2023-12-13 Added Ultra-CPU board and DUAL SID sound output board. Also, add the Ultra-Bus board.
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  2023-08-27 Added an alternative definition of the CS/A bus with a shorter connector and only 48 signals.
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  2022-03-13 Added a PETIO board has been updated
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  2021-12-29 Added a Bus extender board that allows easier access to boards under test.
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  2021-12-29 Added an updated version of the DRVIO board that has its own 16MHz oscillator, and other improvements.
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  2021-11-21 Added a version of the PETIO board that can finally work as a device for other PETs.
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  2021-10-18 I created a burn-in-test for the CS/A computer (based on a PET burn-in program), and also created a git repository for code to build the ROM for the BIOS board.
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  2021-10-18 Updated the VDC Video board for a small display fix. Also updated the BIOS board for a fix to work with certain types of SRAMs. PETIO got a better layout also.

• Disclaimer
• Motivation
• Distribution
• Introduction
• General considerations
• • Other CPUs
  • Bus
  • Technology
  • Schematics
  • Age
• Setups
• • Caspaer
  • CS/A65 legacy
  • Gecko
  • Fat40
  • VC1581
• Software
• • Operating System
  • Emulator
  • ROMs
  • Burn-in tests
• Boards
• • Main Boards
  • I/O boards
  • Special purpose boards
  • Deprecated boards
• Memory Map
• Board numbering scheme

Before you go on, you should know that all this stuff comes with no warranty at all . Of course this hardware is not to be used in any important or even life-critical systems. The hardware schematics and software are provided 'as is', without warranty of any kind. The entire risk as to the quality and performance of the hard- and software is with you. Should the hard- or software prove defective, you assume the cost of all necessary servicing, repair or correction.

Why do I do all this? Good question. It all started with modifications to my trusty old Commodore 64 (that I still own but rarely use, though). Together with a friend I developed a phone switching system so you could use multiple phones on a single phone line, with features like call forwarding, or conferencing. My friend built several revisions of the 6502-based hardware, while I wrote several revisions of the software. It was much fun to do, but it never reached production status, though. When I started studying, I decided to build my own system with advanced features - and the result was the original CS/A65 computer.

One motivation was to actually implement and try out (then and now) advanced features in microprocessor architecture. You can see that in the use of the MMU, or the planned coprocessor board. I also wanted it to be easily understandable, so I decided not to use programmable logic chips but implement everything in standard logic chips. Although nowadays FPGAs look very interesting (and advanced) :-)

The boards, i.e. the schematics, and layout artworks are distributed under the terms of the GNU public license version 2.

The bus design is completely in the public domain. It can be used as long as any changes to the original specs are marked as such (to not let incompatibilites slip in unnoticed).

The CS/A65 computer is a modular computer based on a passive backplane and a number of active boards. The system is based around the 6502 technology originating from the long gone MOS technologies. New chips, however, are available from other sources.

The 6502 is an eight bit CPU with sixteen address lines. A prominent feature of the main CPU board is the MMU that, together with the 20 bus address lines, allow for a megabyte of address space. This MMU is used in the GeckOS/A65 operating system for multitasking support.

Many of the boards originated from my original plans to recreate a Commodore PET3032 computer - on which I got my first programming experiences. It has, however, grown way beyond this now.

Some prominent examples for I/O boards are a SCSI interface, as well as PC floppy interface, or a 6502 emulator.

A software emulator based on the VICE commodore emulator is used for software development for the system

Other CPUs

Currently the system is based on the 6502 processor, although other configurations (65816, 6809) should be possible. The software I use for this systems is homemade and can be found on my OS/A65 page. There are drivers and programs for most of the hardware described below available.

Bus

The bus used is the synchronous bus used in the 6502/6800/6809 CPU bus interfaces. It has some additional lines, though... A description of the bus interface is in bus.html.

Technology

All ICs are standard Low-Power Shottky ('LS) or Advanced Low-Power Shottky ('ALS) TTL ICs. These ICs are still standard, although some of the ICs seem to have been deprecated and are not ported to newer technologies like 'ALS.

Also, getting documentation for the 8bit stuff is getting more and more difficult. But there is an archive in Finland, http://www.zimmers.net/anonftp/pub/cbm/documents/chipdata/index.html that has most of the stuff. However there is a separate 74LS610 page.

Schematics

In the older schematics there are no bypass capacitors (buffering the supply voltage for each IC separately) that should be from Vcc to GND for each IC. Sometimes they are mentioned in the parts list, though. Also there is no 100uF capacitor at the CS/A bus connector between Vcc and GND, to buffer the supply voltage for the board. These are always implict, so I didn't bother drawing them. But you should use them anyway.

Most of the boards, esp. the I/O boards, are pretty straightforward. That's why I concentrate on the special I/O and even then I will only go into detail when necessary. You should have some basic understanding of 6502 hardware design.

In all mentionings I have just written 6502 or 6522 or 6821. These and other chips exist in different flavors, and it is only save to assume a that they are specified for 1MHz bus frequency only. Check if you want a 2MHz system and use the appropriate faster models.

Age

Last but not least one remark. Some of the boards have been designed as early as 1989, which means they are pretty old. Nowadays I would do some things differently, the Reset circuitry is one example that can actually be seen in the newer 2006 versions of the CPU boards for example.

The schematics on this page can be found either as PNG, xfig and gzipped postscript, in which case they are at least from 1999 or earlier, or as Eagle schematics and PNG, in which case they are from 2006 or later.

Nevertheless for the older boards I have mostly transcripted the schematics from my hand-drawing to xfig format. Although I used quite some time to find any remaining error, be warned, there still may be errors. And my hand-drawing is still the authoritative source.

For the newer boards you can be pretty sure that the Eagle schematics and board layout works when the board description indicates that I have tested the board and found no problem.

Caspaer

A Caspaer setup

• It uses the current version of the boards, i.e. VDC 1.4, BIOS 3.0, PETIO 1.1 and CPU 2.0.
• It uses the PET method of generating the system interrupt, by using the extra cable from PETIO to VDC board to use the vertical retrace signal (This way no 50Hz generation in the power supply is necessary).

CS/A65 legacy

• It uses the older version of the boards, i.e. VDC 1.3, BIOS 2.x, CPU 1.2, Keyboard 1.0 and IEEE488 1.1.
• It uses the legacy method of generating the system interrupt, that requires the 50Hz line on the CS/A65 bus to be powered by an external source, in my case by the power supply.

Gecko

Fat40

VC1581

As the system is a PET clone, with the right ROM values the machine can run (almost) all PET software. Here, however, you find software specific to the CS/A.

Also, the board pages contain driver code where appropriate and available.

Operating System

The software used is the GeckOS/A65 operating system. It features the handling of the MMU, serial devices, video output, floppy disk drives, and the newest versions even feature TCP/SLIP (beta) and SCSI (alpha) support.

Emulator

Some of the software development took place on a modified VICE emulator, that now emulates a subset of the CS/A65 hardware. Please check it out at its site.

However, note that this VICE version is rather old and does not even work on my up-to-date Linux system anymore. I did not yet have time to update this emulator to a current VICE version unfortunately.

ROMs

You cannot directly use Commodore ROMs in the PET, at least the Editor ROM and the Kernal have to be modified:

• The Editor ROM needs modified CRTC timer values to produce a standard PAL timing video signal. Also, the 2MHz system needs the CRTC to be programmed with 80 columns - the 80 column PET had special hardware so the CRTC was still programmed to 40 columns even if 80 columns were displayed.
• The Kernal ROM needs to initialize the MMU, so that the CPU has the right memory mapping, and also access to the video memory. The modified kernal also detects if the system is running on 1MHz (40 columns display) or 2MHz (80 column display), and selects the right Editor ROM by setting the correct mapping in the CPU.

• CS/A ROM build on github

Burn-in tests

• pet burnin on github

Main Boards

• CS/A65 CPU The main CPU board features an MMU, and newer versions also sport bus error condition detection. It is a CPU-only board and thus requires the BIOS board for its operation.
• 65816 CPU This board uses a 65816 instead of a 6502, and does not use a real MMU. Instead the 1MByte CS/A bus memory is mapped into the 16MByte 65816 address space. The CPU runs at a whopping 8MHz and the board includes 2MByte fast RAM, while the CS/A bus is clocked at 1MHz. It is a CPU-only board and needs the BIOS board to boot.
• CS/A65 BIOS This BIOS board contains RAM and ROM for the main CPU, as well as simple 50Hz interrupt generation, and a serial (RS232) interface.
• 64k PET CPU This board implements a simple CPU board that includes not only the CPU, but also RAM and ROM (and also a serial interface). It can - as it does not have an MMU - make only restricted use of the bus memory address space, but can fully use the bus I/O area. You can use this board instead of a main CPU and BIOS board to build a Commodore 4032 or a Commodore VC1581 replica.
• Gecko This board implements a single-board computer with a 6502, RAM and ROM, that accidentially ;-) contains a CS/A65 bus connector. It sports a serial interface (RS232), Commodore serial IEC bus, infrared LED driver to use as remote control and a small keyboard interface.
• Auxiliary CPU This board is an optional extension to the CS/A65 CPU board (only! - it requires the MMU features on the CPU board, which are not available on the 65816, PETCPU, or Gecko boards). It monitors the bus for error conditions, then takes over from the main CPU to fix the error condition. Possible error conditions are write protect error, "no execution" fault, or unmapped pages. It can also be used to take a trace of the main CPU.
• Power board This board provides basic services, using power from a PC power supply. It includes voltage monitor, 3.3V generation, battery buffered power, as well as I2C controlled clock, RAM, and an I2C flash ROM.

I/O boards

• Video The VDC board implements a 6545 CRTC-based video interface. It includes 64k dynamic RAM that is used as video memory (at least parts of). If the system bus runs with 1MHz it can display 40 columns PAL video, on 2MHz it can display 80 columns video.
• CBM PET I/O This board contains basically all Commodore PET I/O interfaces except for the video. It thus features an IEEE488 interface, as well as keyboard, userport and tape interfaces. It also contains a small beeper to make noise :-)
• Net/USB/SD A combined Ethernet, USB host+device and SD-Card interface board! All parts connected via SPI65b (and 3.3V converters).
• Ethernet An ethernet interface for the CS/A! Using the CS8900A ethernet chip on an Olimex adapter board. TCP/IP functionality provided by the uIP TCP/IP stack.
• USB A USB interface for the CS/A! Using one SL811HS ethernet chip each for host and device operations, this board allows to use a USB keyboard and mouse, but can also provide a USB keyboard for a USB host!
• MMC/SD-Card The MMC- and SD-cards can use a simple SPI-based interface. On this board the CS/A can read MMC and SD-Cards!
• SCSI This board implements a parallel SCSI interface to attach SCSI devices to the CS/A65 computer. It is currently only tested with disk drives, though.
• DRVIO floppy and IEC This board contains a PC-style floppy drive interface using the WD1772 chip in a way that is compatible with the Commodore VC1581 disk drive - so that it can be used to build a Commodore VC1581 replica.
• Double UART Two UART 16550A implement two serial line RS232 interfacs.
• PC floppy This board contains a PC-style floppy drive interface using the WD1772 chip. It also contains a small printer interface.

Special purpose boards

• Block Transfer Engine This block transfer engine allows to copy blocks of memory without using the CPU - in a way that is much faster than even the 65816: it uses only two cycles per transferred byte!
• SIMM RAMDisk This board implements a RAM Disk based on the (nowadays quite old) SIMM memory modules. Using four of them you can build a RAM disk drive with up to 16MByte capacity (only tested to 4M though). Two versions are available, an older one with complete discrete logic, and a new one using a CPLD programmable logic chip.
• Coprocessor This is a coprocessor board, that runs in parallel to the main CPU and has its own 64k of memory mapped into the 1M bus address space as shared memory. It can be used for I/O offloading, e.g. for a SCSI or TCP/IP interface.
• Emulate a 6502 This board allows to connect another 6502-based computer with the CS/A65. The other 6502's 64k address space is mapped into the 1M bus address space. So with the help of the MMU that main CPU can play the role of the replaced other computer's CPU for example to test new ROM versions of the other computer.
• Emulate a keyboard This board emulates up to two matrix-based keyboard. It features two shared memory areas, where the memory is shared between the main CPU and the keyboard matrix select and detect lines.
• VIA prototyping This board has a VIA, with address decoding and a large area ready for prototyping.

Deprecated boards

• 65816 V1 CPU The predecessor of the current V2 65816 CPU board. It does not use a CPLD but only a PAL as programmable logic. So it is easier to understand and kept here for reference and educational purposes.
• 64k CPU This is a 64k CPU that is actually a stripped down Gecko board. It only existed as schematics and is replaced by the PETCPU board.
• Keyboard and RS232 This is a PET compatible keyboard interface, plus a ACIA 6551 based serial (RS232) interface. As the 6551 is a rather rough-edged chip, and the keyboard interface is available with the PETIO board in a more compatible way, this board is replaced by the PETIO and DUART boards.
• IEEE488 and CBM IEC This board implements a partially PET compatible IEEE488 interface, plus a Commodore serial IEC bus as it is used in the C64 for example. In addition both busses can be used not only as master, but also as drive so that the CS/A65 computer can be used as drive by the PET or C64. This board is replaced by the PETIO and DRVIO boards.

The boards are numbered with a major and a minor version number, plus a letter denoting the revision of the board. So for example a video board is numbered "1.3E", means that it is major version 1, minor version 3, and the fifth revision (E).

The revisions are changed when a compatible modification has been made - this can be a redraw of the schematics (e.g. with Eagle instead of xfig), or a minor bugfix (like fixing the reset behaviour). It is also used when during development the initial bugs are shaken out (which may involve incompatible changes, though, see the DRVIO board...)

The minor version is increased when there is a software-compatible extensions of the previous board. For example the 1.4 version of the VDC board, although the video connector has changed (composite is gone, but VCC is there now) it can be used very much like the V1.3 versions (software-wise).

The major version number is increased by major and incompatible changes. For example the BIOS board is in its third major version: the first version used an ACIA as RS232 interface, the second one an UART instead. The third version is a complete redesign with the possibility to provide up to 512k RAM and/or ROM. It could be used like a version 2 board, but is a major change anyway, therefore a new major version.

I try to keep the numbering consistent, but I am only human ;-)