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PostPosted: Sat Mar 06, 2021 7:51 am 
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Hello,

I'm Nick and have a lot of experience building 68xx and Z80 microcomputers. I found a 65C816 while cleaning up my hobby-room. I tried to design a schematic that should give a working computer, but after reading some posts in this forum I am confused. I think it will not work at all. See attached schematic. Any commnets and hints are very welcome.


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File comment: Draft schematic 65816 computer
65816scrumpel9.pdf [132.46 KiB]
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PostPosted: Sat Mar 06, 2021 10:44 am 
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Welcome Nick!

You're asking quite a lot, to review such a schematic, but maybe someone will help.

Possibly you could help out by drawing and explaining the logic: we can assume that know how to connect address and data busses, but the common difficulties are with the glue logic, especially the clock (if that's not trivial) the chip select and write enables for various chips, and in the case of an '816 design, the latching of high address bits.


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PostPosted: Sat Mar 06, 2021 12:30 pm 
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This is the corrected version, thanks to Handyandy. Remarks still welcome.


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File comment: Corrected version of the schematic
65816scrumpel9.pdf [127.3 KiB]
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PostPosted: Sat Mar 06, 2021 3:40 pm 
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Welcome, Nick!

I see lots of logic chips which are labeled as being HCT series. Is this just a default notation supplied by the schematic software, or do you actually intend to use HCT? Based on a quick scan of the drawing, I notice only one chip (the '245 transceiver) that'll experience less than rail-to-rail swings at its inputs and will thus require one of the "T" variant families such as HCT. (And BTW for the transceiver I'd consider an 'AHCT245 rather than 'HCT245.)

As you may be aware, most (all?) of the other glue can use a non-T variant such as HC. (T variants will work but T series inputs have somewhat less noise margin than non-T. For hobby applications it's probably not enough to matter. But, other things being equal, I suggest you avoid T series except where it's necessary.)

This part (below) is probably alright, but as noted I'd switch the HCT to HC. Or, for the NAND's, I'd consider using 'AHC. It's important that the /WR signal not be unduly delayed, and AHC series logic is faster than HC (AC too is faster but with AC certain precautions apply).
Attachment:
nbrok excerpt1.png
nbrok excerpt1.png [ 13.41 KiB | Viewed 556 times ]


Re the LED's (below), I guess you know you could save at least one inverter. The cpu's E output is strong enough to drive the LED directly, and the RXD signal could use just a single inverter. In each case the LED would need its other lead moved from Vcc to Gnd. And of course none of this matters if you have lots of extra inverters available. :)
Attachment:
nbrok excerpt2.png
nbrok excerpt2.png [ 18.25 KiB | Viewed 556 times ]


Finally, I see the 8 MHz clock oscillator connects directly to the '816 clock input. Is the osc capable of providing fast the rise & fall times which the '816 clock input prefers? I'd consider using an AC or AHC series gate as a buffer between the osc and the cpu clock input.

Sorry not to have any more substantial comments, for example on subjects such as address decoding and others. Your schematic is drawn more or less as a net list, and I'm one of the folks who find that a real impediment. The choice is up to you, of course. But IMO it's a write-only approach, unfriendly to those trying to read the schematic. In future could you maybe at least separate the address, data and control buses? Cheers,

Jeff

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PostPosted: Sat Mar 06, 2021 3:45 pm 
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nbrok wrote:
This is the corrected version, thanks to Handyandy. Remarks still welcome.


Hi,

Nice to see another '816 project - go for it!

I'm glanced at the schematic - not in any great detail so not checked the actual logic, etc. but I see:

8KB Flash eeprom
2 x 512KB SRAM (1MB, Nice!)
6522 VIA
65C51 UART

with some TTL to decode and latch to upper 8 address bus lines.

Things I note:

You're not using the CA or CB pins out of the VIA. These are handy extra pins, also usable for e.g. a parallel printer interface or high(ish) speed parallel transfer bus and so on.

Not connected the IRQ pin from the 6522 either? You might want that to get it to generate nice timer interrupts.

The 65c51 has a bug to do with the Tx side - the transmit clear bit in the status register is always clear, so you need either an alternative timer interrupt (which the VIA can provide) or a software loop...

To me, there is too much "glue" logic, however you may be trying to stay faithful to a retro style design then that's fine by me - I "cheated" with a couple of GALs.

8Mhz is a good target speed too.

Let us know how you're getting on with it!

Cheers,

-Gordon

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See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/


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